SPTM: function-level TLBI evidence (369 vs 264 insns, added completion wait)
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@@ -48,8 +48,21 @@ hardening — none of it is named in the 162-CVE advisory:
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The TLBI string has five code xrefs in 27.2, at functions starting near
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The TLBI string has five code xrefs in 27.2, at functions starting near
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`0xfffffff0270c7aac`, `0xfffffff0270c85f8`, `0xfffffff0270c987c`,
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`0xfffffff0270c7aac`, `0xfffffff0270c85f8`, `0xfffffff0270c987c`,
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`0xfffffff0270cacf4` and `0xfffffff027109940`. These are new/edited DART
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`0xfffffff0270cacf4` and `0xfffffff027109940`.
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invalidation paths, not present in the 27.0.1 image.
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Function-level alignment makes the change concrete. The first TLBI function
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(`0xfffffff0270c7aac`, **369 instructions**) matches a **264-instruction**
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function at `0xfffffff0270b7a90` in 27.0.1 (prefix similarity 0.90). The 27.2
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version inserts a block that:
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1. reads `DAIF` and masks interrupts (`msr DAIFSet, #0x7`, `dsb sy`);
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2. reads `CNTVCTSS_EL0` and `CNTFRQ_EL0` and computes a deadline;
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3. loads a timeout constant (`0x3d40` = 15680 units) and the TLBI verification
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register address;
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4. polls/validates the GMMU TLBI completion, and only then continues.
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The 27.0.1 function issues the invalidation and proceeds without that wait. This
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is not a relocated instruction; it is an added completion check.
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The DART violation names are not referenced by a direct `adr`/`adrp+add` — they
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The DART violation names are not referenced by a direct `adr`/`adrp+add` — they
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are indexed through a violation table, so their exact raiser is a table lookup.
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are indexed through a violation table, so their exact raiser is a table lookup.
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@@ -107,6 +120,14 @@ These are grounded in the 27.2 changes and the unchanged MIE checks. None is a
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working exploit; each needs a reachable primitive that the firmware diff does
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working exploit; each needs a reachable primitive that the firmware diff does
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not supply.
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not supply.
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0. **GMMU TLBI completion race (strongest static lead).** 27.0.1 lacks the
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completion wait that 27.2 adds to the DART invalidation path. A DMA-capable
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device whose translation is invalidated can keep using a stale GMMU entry if
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the invalidation has not completed; the stale entry is a DMA read/write to a
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page that SPTM has already unmapped or repurposed. This is an IOMMU bypass,
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not a page-table permission bypass, but it defeats the same isolation goal.
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Reachability requires a userclient that owns DART mappings and can keep DMA
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in flight across an unmap — the next thing to test on hardware.
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1. **DART unganged-GAPF race.** 27.2 adds a violation for a race between
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1. **DART unganged-GAPF race.** 27.2 adds a violation for a race between
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unganging a DART and a page-table remap. On 27.0.1 the race can leave a stale
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unganging a DART and a page-table remap. On 27.0.1 the race can leave a stale
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DART translation if a mapping is unganged while a PTE is remapped. A stale
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DART translation if a mapping is unganged while a PTE is remapped. A stale
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